The present invention relates generally to semiconductor manufacturing and, more particularly, to forming one or more fins in FinFET devices.
The escalating demands for high density and performance associated with ultra large scale integration semiconductor devices require design features, such as gate lengths, below 100 nanometers (nm), high reliability and increased manufacturing throughput. The reduction of design features below 100 nm challenges the limitations of conventional methodology.
For example, when the gate length of conventional planar metal oxide semiconductor field effect transistors (MOSFETs) is scaled below 100 nm, problems associated with short channel effects, such as excessive leakage between the source and drain, become increasingly difficult to overcome. In addition, mobility degradation and a number of process issues also make it difficult to scale conventional MOSFETs to include increasingly smaller device features. New device structures are therefore being explored to improve FET performance and allow further device scaling.
Double-gate MOSFETs represent new structures that have been considered as candidates for succeeding existing planar MOSFETs. In double-gate MOSFETs, two gates may be used to control short channel effects. A FinFET is a recent double-gate structure that exhibits good short channel behavior. A FinFET includes a channel formed in a vertical fin. The FinFET structure may be fabricated using layout and process techniques similar to those used for conventional planar MOSFETs.
Implementations consistent with the principles of the invention form one or more fins in FinFET devices through the use of a sacrificial amorphous carbon deposition.
In accordance with the purpose of this invention as embodied and broadly described herein, a method for forming a fin in a FinFET is disclosed. The method includes forming a carbon layer on a silicon on insulator (SOI) wafer; forming a mask on the carbon layer; etching the mask and the carbon layer to a first width; etching the carbon layer to a second width; forming an oxide layer over the mask and carbon layer; removing a portion of the oxide layer and the mask; removing the carbon layer to create an opening in a remaining portion of the oxide layer; forming silicon in the opening; and removing the remaining portion of the oxide layer and silicon located under the remaining portion of the oxide layer to form a fin.
In another implementation consistent with the present invention, a method of manufacturing a semiconductor device that includes a substrate, an insulating layer formed on the substrate, and a conductive layer formed on the insulating layer, is provided. The method includes depositing an amorphous carbon layer over the conductive layer; forming a hard mask over the amorphous carbon layer; etching the hard mask and the amorphous carbon layer to a first width; etching the amorphous carbon layer to a second width; depositing an oxide layer to surround the hard mask and amorphous carbon layer; removing a portion of the oxide layer and the hard mask; removing the amorphous carbon layer to form an opening in a remaining portion of the oxide layer; filling the opening with conductive material; removing the remaining portion of the oxide layer and a portion of the conductive layer to form a fin structure; forming a source region and a drain region; depositing a gate material over the fin structure; and patterning and etching the gate material to form at least one gate electrode.
In yet another implementation consistent with the principles of the invention, a method for forming at least one fin in a semiconductor device that includes a substrate, an insulating layer formed on the substrate, and a conductive layer formed on the insulating layer, is provided. The method includes forming a carbon layer over the conductive layer and forming a mask over the carbon layer. The method further includes etching the mask and carbon layer to form at least one structure, where the structure has a first width, reducing the width of the carbon layer in the at least one structure to a second width, depositing an oxide layer to surround the at least one structure, removing a portion of the oxide layer and the mask, removing the carbon layer to form an opening in a remaining portion of the oxide layer for each of the at least one structure, filling the opening with conductive material, and removing the remaining portion of the oxide layer and a portion of the conductive layer to form the at least one fin.